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Formal Methods for Hardware Verification [electronic resource] :6th International School on Formal Methods for the Design of Computer, Communication, and Software Systems, SFM 2006, Bertinoro, Italy, May 22-27, 2006, Advanced Lectures / edited by Marco Bernardo, Alessandro Cimatti.

by Bernardo, Marco [editor.]; Cimatti, Alessandro [editor.]; SpringerLink (Online service).
Material type: materialTypeLabelBookSeries: Lecture Notes in Computer Science: 3965Publisher: Berlin, Heidelberg : Springer Berlin Heidelberg, 2006.Description: VII, 243 p. Also available online. online resource.ISBN: 9783540343059.Subject(s): Computer science | Computer Communication Networks | Software engineering | Logic design | Computer Science | Software Engineering | Programming Languages, Compilers, Interpreters | Logics and Meanings of Programs | Special Purpose and Application-Based Systems | Computer Communication NetworksDDC classification: 005.1 Online resources: Click here to access online
Contents:
Hardware Design and Simulation for Verification -- Automatic Test Pattern Generation -- An Introduction to Symbolic Trajectory Evaluation -- BDD-Based Hardware Verification -- SAT-Based Verification Methods and Applications in Hardware Verification -- Building Efficient Decision Procedures on Top of SAT Solvers -- Refinement and Theorem Proving -- Floating-Point Verification Using Theorem Proving.
In: Springer eBooksSummary: This book presents a set of 8 papers accompanying the lectures of leading researchers given at the 6th edition of the International School on Formal Methods for the Design of Computer, Communication and Software Systems, SFM 2006, held in Bertinoro, Italy in May 2006. SFM 2006 was devoted to formal techniques for hardware verification and covers several aspects of the hardware design process, including hardware design languages and simulation, property specification formalisms, automatic test pattern generation, symbolic trajectory evaluation, BDD-based and SAT-based model checking, decision procedures, refinement, theorem proving, and the verification of floating point units.
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Hardware Design and Simulation for Verification -- Automatic Test Pattern Generation -- An Introduction to Symbolic Trajectory Evaluation -- BDD-Based Hardware Verification -- SAT-Based Verification Methods and Applications in Hardware Verification -- Building Efficient Decision Procedures on Top of SAT Solvers -- Refinement and Theorem Proving -- Floating-Point Verification Using Theorem Proving.

This book presents a set of 8 papers accompanying the lectures of leading researchers given at the 6th edition of the International School on Formal Methods for the Design of Computer, Communication and Software Systems, SFM 2006, held in Bertinoro, Italy in May 2006. SFM 2006 was devoted to formal techniques for hardware verification and covers several aspects of the hardware design process, including hardware design languages and simulation, property specification formalisms, automatic test pattern generation, symbolic trajectory evaluation, BDD-based and SAT-based model checking, decision procedures, refinement, theorem proving, and the verification of floating point units.

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