Normal view MARC view ISBD view

Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation [electronic resource] :20th International Workshop, PATMOS 2010, Grenoble, France, September 7-10, 2010, Revised Selected Papers / edited by René Leuken, Gilles Sicard.

by Leuken, René [editor.]; Sicard, Gilles [editor.]; SpringerLink (Online service).
Material type: materialTypeLabelBookSeries: Lecture Notes in Computer Science: 6448Publisher: Berlin, Heidelberg : Springer Berlin Heidelberg, 2011.Description: XII, 260p. online resource.ISBN: 9783642177521.Subject(s): Computer science | Computer Communication Networks | Computer system performance | Software engineering | Computer software | Logic design | Computer simulation | Computer Science | System Performance and Evaluation | Simulation and Modeling | Computer Communication Networks | Software Engineering | Logics and Meanings of Programs | Algorithm Analysis and Problem ComplexityDDC classification: 004.24 Online resources: Click here to access online In: Springer eBooksSummary: This book constitutes the refereed proceedings of the 20th International Conference on Integrated Circuit and System Design, PATMOS 2010, held in Grenoble, France, in September 2010. The 24 revised full papers presented and the 9 extended abstracts were carefully reviewed and are organized in topical sections on design flows; circuit techniques; low power circuits; self-timed circuits; process variation; high-level modeling of poweraware heterogeneous designs in SystemC-AMS; and minalogic.
Tags from this library: No tags from this library for this title. Add tag(s)
Log in to add tags.
    average rating: 0.0 (0 votes)

This book constitutes the refereed proceedings of the 20th International Conference on Integrated Circuit and System Design, PATMOS 2010, held in Grenoble, France, in September 2010. The 24 revised full papers presented and the 9 extended abstracts were carefully reviewed and are organized in topical sections on design flows; circuit techniques; low power circuits; self-timed circuits; process variation; high-level modeling of poweraware heterogeneous designs in SystemC-AMS; and minalogic.

There are no comments for this item.

Log in to your account to post a comment.
@ Jomo Kenyatta University Of Agriculture and Technology Library

Powered by Koha