Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation [electronic resource] :21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011. Proceedings / edited by José L. Ayala, Braulio García-Cámara, Manuel Prieto, Martino Ruggiero, Gilles Sicard.
by Ayala, José L [editor.]; García-Cámara, Braulio [editor.]; Prieto, Manuel [editor.]; Ruggiero, Martino [editor.]; Sicard, Gilles [editor.]; SpringerLink (Online service).
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BookSeries: Lecture Notes in Computer Science: 6951Publisher: Berlin, Heidelberg : Springer Berlin Heidelberg, 2011.Description: XI, 352p. online resource.ISBN: 9783642241543.Subject(s): Computer science | Computer Communication Networks | Computer system performance | Software engineering | Computer software | Logic design | Computer simulation | Computer Science | System Performance and Evaluation | Simulation and Modeling | Computer Communication Networks | Software Engineering | Algorithm Analysis and Problem Complexity | Logics and Meanings of ProgramsDDC classification: 004.24 Online resources: Click here to access online
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Springer eBooksSummary: This book constitutes the refereed proceedings of the 21st International Conference on Integrated Circuit and System Design, PATMOS 2011, held in Madrid, Spain, in September 2011. The 34 revised full papers presented were carefully reviewed and selected from numerous submissions. The paper feature emerging challenges in methodologies and tools for the design of upcoming generations of integrated circuits and systems and focus especially on timing, performance and power consumption as well as architectural aspects with particular emphasis on modeling, design, characterization, analysis and optimization.
| Item type | Current location | Call number | Status | Date due | Barcode |
|---|---|---|---|---|---|
| MAIN LIBRARY | QA76.9.E94 (Browse shelf) | Available |
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This book constitutes the refereed proceedings of the 21st International Conference on Integrated Circuit and System Design, PATMOS 2011, held in Madrid, Spain, in September 2011. The 34 revised full papers presented were carefully reviewed and selected from numerous submissions. The paper feature emerging challenges in methodologies and tools for the design of upcoming generations of integrated circuits and systems and focus especially on timing, performance and power consumption as well as architectural aspects with particular emphasis on modeling, design, characterization, analysis and optimization.
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